ZamiaCAD

HomePage | RecentChanges | EditorIndex | TextEditorFamilies | Preferences

 Open source IDE for VHDL design based on Eclipse

 Authors:  Guenter Bartsch (main developer and project founder), 
           Anton Chepurov from Tallinn University of Technology 
           Dr. Rainer Dorsch from IBM 
           Dr. Maksim Jenihhin from Tallinn University of Technology 
           Dr. Jaan Raik from Tallinn University of Technology 
 Homepage: http://zamiacad.sourceforge.net/web/
 Family:   IDEFamily EclipseFamily
 Platform: Eclipse
 License:  GPL
A successor to Signs

zamiaCAD is a modular and extensible platform for advanced hardware design, analysis, and research.

Its core components are

The frontends consist of a parser and an elaboration engine. Currently, VHDL has a complete frontend, Verilog only has a parser. Applications like a simulator and an eclipse GUI are built on top of the IG and potentially language dependent structures like the abstract syntax tree.

Intended areas of use include

In these areas zamiaCAD targets the automation of currently manual design and verification tasks. This increases register transfer level design and verification engineer productivity. Currently the complete VHDL standard is supported as hardware description language, but it may be extended by adding other frontends, e.g. for Verilog.

 Screenshot:


HomePage | RecentChanges | EditorIndex | TextEditorFamilies | Preferences
Edit text of this page | View other revisions
Last edited February 23, 2011 4:42 pm (diff)
Search: